NEW TO THE PROJECT!!!

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NEW TO THE PROJECT!!!

RicheeRich
Hi,
        I am just starting this project and am glad to say that I am a Computer Science graduate...yay!!...doesn't mean anything!  I am wondering how to get started with the first chip...the NOT chip...my question is do I need to implement the NAND chip first or is it already implemented for us?????? If the chip is already implemented for us, can you give an example on how to correctly implement the syntax for the NAND chip.  Also...I see there is a .class file...do I need to create a .class file for each chip I create??  Where can I find the rules for the syntax I am supposed to use...I need help getting started and although you may feel the documentation given is exceptional, I must disagree and say it is pretty worthless on the level of HOW TO GET STARTED?!?!?!?

Thanx,
Richee
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Re: NEW TO THE PROJECT!!!

cadet1620
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You don't need to implement the Nand chip; it and the constants true and false are the givens from which all else is derived.

You don't need to do anything with .class files, they are Java executable files.

The definition of HDL is in Appendix A, available from the Course page. There is also an example of designing and writing the HDL for the Xor chip in figure 1.6. Important: if you want to experiment with the Xor chip before writing other HDL files, copy the Xor.hdl skeleton file into the projects\00 directory and experiment there. Xor.hdl will fail in projects\01 unless the Not, And and Or chips have been written.

Hint for Not.hdl:

Look at the truth table for Nand

a b | out
0 0 |  1
0 1 |  1
1 0 |  1
1 1 |  0

In particular, look at the top and bottom row of the table.  What happens when a=b?

--Mark
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Re: NEW TO THE PROJECT!!!

ybakos
In reply to this post by RicheeRich
Richee, you need to be diligent in reading the book and also the project documents that are online. They contain all the answers you seek.
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Re: NEW TO THE PROJECT!!!

RicheeRich
Ok, thank you for the responses...I have another question, I have not purchased the book yet but plan to by tomorrow.  Will this prevent me from being able to write my first chip?   So do I need to implement my Not chip with the use of Nand parts?  I mean a Not gate is pretty simple, meaning the output is opposite of the input....I get it, so how do I implement and if-else statement?

Thank you,
Richee
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Re: NEW TO THE PROJECT!!!

ybakos
Richee, take a look at the pdfs of the intro & chapter 1 of the book. (They are on the book web site.)

How to "implement an if-else statement" is a great question. Keep in mind that hardware is not software, and be sure to read the relevant chapters/appendix/pages from the book before doing the projects.
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Re: NEW TO THE PROJECT!!!

RicheeRich
In reply to this post by ybakos
Is the answer for Not chip this:

CHIP Not{

  IN in
  OUT out

  PARTS:
  BUILTIN Nand;
}

When I put this into the simulator I get this error:
"In HDL file E:/nand2tetric/Not.hdl, Line 7, A GateClass name is expected.

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Re: NEW TO THE PROJECT!!!

cadet1620
Administrator
You don't need to use the BUILTIN keyword in any HDL you write; it's for making new built-in chips written in Java.

Look at the example HDL in figure 1.6 and in Appendix A.

Also, read the Hardware Construction Survival Kit.

--Mark
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Re: NEW TO THE PROJECT!!!

RicheeRich
In reply to this post by ybakos
Ok so you are saying that I have to order the book before I can create my first chip.
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Re: NEW TO THE PROJECT!!!

ybakos
"Richee, take a look at the pdfs of the intro & chapter 1 of the book. (They are on the book web site.) "
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Re: NEW TO THE PROJECT!!!

RicheeRich
Would the answer for chip Not be:

Chip Not{
  IN a
  IN b
  OUT out

Nand(a=false, b=false, out=true)
Nand(a=false, b=true, out=true)
Nand(a=true, b=false, out=true)
Nand(a=true, b=true, out=false)
}

?????????????????????????????????????????????????
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Re: NEW TO THE PROJECT!!!

RicheeRich
In reply to this post by ybakos
Ybakos,
          You keep telling me to read the material...I have read the material...and that is what I am saying is that the material is not doing a good job explaining...I understand boolean logic.

Thank you,
Richee

P.S. In school, when a student has a problem understanding something they usually go to the teacher.  Well I am coming to the teacher and asking for help...I am not asking you to do my assignment, but I am asking how to get started...If you could give me a little more detail on how to do my Not chip I am sure I will not need your help with the rest of my chips.
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Re: NEW TO THE PROJECT!!!

RicheeRich
In reply to this post by ybakos
Or is the answer for the Not chip:

CHIP Not{
  IN in
  OUT out

 PARTS:
 Nand(in=in, out=notin)
}

??????????????????????????????
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Re: NEW TO THE PROJECT!!!

ybakos
In reply to this post by RicheeRich
Richee, to be frank, I'm not your teacher -- I'm just some guy who is taking his personal time to steer you in the right direction.

(Also, please don't post your solutions in the forum.)

I have a question: why are you asking if your implementation is correct or not? You should be running the provided tests in the hardware simulator, which gives you the answer to your question.

The reason I'm pushing you to focus on the reading is because your questions and the flaws in your work can all be resolved by reading (and re-reading) everything mentioned in this thread so far.

For example, your solution above is missing a trailing semicolon. This is specifically discussed in the appendix regarding the HDL syntax.
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Re: NEW TO THE PROJECT!!!

cadet1620
Administrator
In reply to this post by RicheeRich
Just to make sure.  You have found the online materials and have read the Project 0 and Project 1 materials, both lecture slides and book chapters, and have done the Hardware Simulator Tutorial?

--Mark
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Re: NEW TO THE PROJECT!!!

RicheeRich
In reply to this post by ybakos
It is called an analogy, I know you are not my teacher...I also understand I was missing a semicolon...the point of the post was to try and get insight as to how output is generated.  This is something I have been trying to explain...MY HDL FILE IS NOT OPENING IN THE HARDWARE SIMULATOR. ERROR, "In HDL file E:/nand2tetric/Not.hdl, Line 7, A GateClass name is expected."

Thanks again for all your help.
Richee

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Re: NEW TO THE PROJECT!!!

RicheeRich
In reply to this post by cadet1620
Thank you Cadet, I have found all of the information.
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Re: NEW TO THE PROJECT!!!

RicheeRich
OK...sorry... and sorry if I sound a little frustrated as I am sure you have a bunch of people sounding like this when they get started.  I have a question and I don't think you giving me the answer will be cheating in any way. Is it a true statement if I say that when building my first chip, the "Not" chip, I can only use parts that I have already created.  Since your project comes with the "Nand" chip implemented, then is it a true statement  that my "Not" chip will only be made up of "Nand" parts???
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Re: NEW TO THE PROJECT!!!

RicheeRich
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Re: NEW TO THE PROJECT!!!

RicheeRich
Again, I would like to apologize for sounding frustrated...so, sorry ybakos.