implementing new chips

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implementing new chips

huskeyw
I am trying to implament a And3way gate, and if I use the hardware simulator with no test script, I get correct output, but I tried to edit the and test script and it seams to hang up on:
output-list a%B3.1.3 b%B3.1.3 c%B3.1.3 out%B3.1.3;

(I added the c%3.1.3 ) I can't find a definition on what these numbers mean.. if I step through the test it says it fails on each one, but the output is correct to the .cmp file
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Re: implementing new chips

Lozminda
Hi
I had a similar problem when I started the course. You can't edit the test scripts.

At the beginning of the course (bearing in mind i'm only on chapter 6 so by no means an expert) you are only required to do the most basic of chip building.

When you load the test script (for example the And gate) the simulator loads up the And.hdl file, which you edit in a separate text editor.

For you to have a successful test your chips output has to match the comparison file.

If you want to do anything "exotic" you can't test them using test scripts, (I wasn't able to find out how). You'll have to test them using the eval button and by putting different values in your inputs etc. The simulator is actually quite powerful, but i found a little frustrating at the beginning. Baby steps at the beginning, trust me it gets more fun by chapter3.

Hopefully that helps. Am online for a bit if you need anymore help...
Loz
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Re: implementing new chips

huskeyw
so your saying that we can only build the chips they defined.. so a 3way AND gate, which simplifies the multi mux design greatly for my eyes, is a no go for testing?


 

I built all the parts

// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/01/And3way.hdl

/**
 *  3 input And gate:
 * out = 1 if (a == 1 and b == 1 and C == 1)
 *       0 otherwise
 */

CHIP And3way {
    IN a, b, c;
    OUT out;

    PARTS:
    // Put your code here:
                And(a=a,b=b,out=c1); //first and to out 1
                And(a=c,b=c1,out=out); // send and with out put
}


// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/01/And3way.tst


tst file
load And3way.hdl,
output-file And3way.out,
compare-to And3way.cmp,
output-list a%B3.1.3 b%B3.1.3 c%B3.1.3 out%B3.1.3;

set a 0,
set b 0,
set c 0,
eval,
output;

set a 1,
set b 0,
set c 0,
eval,
output;

set a 0,
set b 1,
set c 0,
eval,
output;

set a 1,
set b 1,
set c 0,
eval,
output;

set a 0,
set b 0,
set c 1,
eval,
output;

set a 1,
set b 0,
set c 1,
eval,
output;

set a 0,
set b 1,
set c 1,
eval,
output;

set a 1,
set b 1,
set c 1,
eval,
output;

cmp file

| a | b | c |out|
| 0 | 0 | 0 | 0 |
| 1 | 0 | 0 | 0 |
| 0 | 1 | 0 | 0 |
| 1 | 1 | 0 | 0 |
| 0 | 0 | 1 | 0 |
| 1 | 0 | 1 | 0 |
| 0 | 1 | 1 | 0 |
| 1 | 1 | 1 | 1 |


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Re: implementing new chips

huskeyw
I got it to work... YA!!!
changed my output-list to
output-list a b c out;   and now it works..
Maybe the number are for built in stuff..
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Re: implementing new chips

Lozminda
So did you manage to change the test script and get your 3 way And gate to work in the simulator ?

If so awesome. This'll be a good post for others, I wasn't able to do it and gave up on doing anything "off path".

Bravo

Loz
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Re: implementing new chips

WBahn
Administrator
In reply to this post by huskeyw
huskeyw wrote
I am trying to implament a And3way gate, and if I use the hardware simulator with no test script, I get correct output, but I tried to edit the and test script and it seams to hang up on:
output-list a%B3.1.3 b%B3.1.3 c%B3.1.3 out%B3.1.3;

(I added the c%3.1.3 ) I can't find a definition on what these numbers mean.. if I step through the test it says it fails on each one, but the output is correct to the .cmp file
Look in Appendix B on page 302 of the text.

The format specifier is of the form %Fq,r,s where

F is from {B,X,D,S}
q is the number of blank spaces to print before the value
r is the number of columns to use for the printout of the value
s is the number of blank spaces to print after the value

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Re: implementing new chips

huskeyw
WBahn wrote
huskeyw wrote
I am trying to implament a And3way gate, and if I use the hardware simulator with no test script, I get correct output, but I tried to edit the and test script and it seams to hang up on:
output-list a%B3.1.3 b%B3.1.3 c%B3.1.3 out%B3.1.3;

(I added the c%3.1.3 ) I can't find a definition on what these numbers mean.. if I step through the test it says it fails on each one, but the output is correct to the .cmp file
Look in Appendix B on page 302 of the text.

The format specifier is of the form %Fq,r,s where

F is from {B,X,D,S}
q is the number of blank spaces to print before the value
r is the number of columns to use for the printout of the value
s is the number of blank spaces to print after the value

so it looks like its a little picky on how your compare and your string is for the output of the test.. so if you drop off the format parts, it works to test.. but if you add the format parts, it looks better, but one wrong space in the compare file and it fails..

but now I am worried,, did it really pass, or is this a bug..
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Re: implementing new chips

Lozminda
In reply to this post by Lozminda
PS

In Appendix B of the book, there's a lot of information about the test scripts as well
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Re: implementing new chips

WBahn
Administrator
In reply to this post by huskeyw
huskeyw wrote
so it looks like its a little picky on how your compare and your string is for the output of the test.. so if you drop off the format parts, it works to test.. but if you add the format parts, it looks better, but one wrong space in the compare file and it fails..

but now I am worried,, did it really pass, or is this a bug..
It's a lot picky -- it's doing a brain-dead text comparison so any mismatch will cause it to fail.

How the comparisons are usually generated is by running the test script on a known, vetted solution. That way the formats in both files are guaranteed to be identical.