Nand2Tetris Questions and Answers Forum

If you have questions about Nand2Tetris projects or software, you are in the right place. Please select a sub-forum and review the posts; there is a good chance that a similar question was previously asked and answered. If not,  post your question, and we will answer it shortly. If you feel like answering some of the questions yourself, feel free. Please avoid posting solutions or solution segments (a few lines of code is fine). It's important to let people have the freedom to build the computer on their own.

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Software and tools can be downloaded from the Nand2Tetris site.
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Topics (3170)
Replies Last Post Views Sub Forum
Assembler maps two variables to the same address? by dfaulken
1
by dfaulken
Project 6
Announcing Logisim display by ivant
3
by cadet1620
More Fun to Go
Raycaster on the Hack platform by Acedio
18
by jamesleibert
Other
Fast circle algorithm by jamesleibert
2
by jamesleibert
Project 12
Any thoughts on how to add support for passing subroutines as arguments? by tungsten
4
by tungsten
Chapter 10
program execution not stopping at breakpoints by kraftwerk1611
0
by kraftwerk1611
Project 8
problem for cpu.hdl by weijia
2
by weijia
Chapter 5
NestedCall: Why THIS and THAT are first set to -1 and then to 3000 and 4000 by kraftwerk1611
1
by cadet1620
Project 8
which one of these Sys.vm file should be used for NestedCall test? by kraftwerk1611
1
by cadet1620
Project 8
Is there any required or recommended order in which *.vm files should be read by VM translator and written to final *.asm file? by kraftwerk1611
1
by cadet1620
Project 8
When is it ok to call a subroutine without specifying the class it belongs to? by tungsten
2
by tungsten
Chapter 9
internal pin naming conventions by ivan
1
by cadet1620
Project 1
stuck on loading chip.. please help guys by Jon Snow
1
by cadet1620
Hardware Simulator
Different bus widths error by Uwarsta
3
by cadet1620
Chapter 2
ALU-Problem by weijia
3
by weijia
Chapter 2
Assembly language and chips that run at different speeds by rayman22201
3
by cadet1620
Other
2 complement and ALU calculations by AlejandroFB
3
by cadet1620
Chapter 2
A question before starting by Jason
12
by cadet1620
Chapter 7
Do we have to use jump instructions to implement eq, lt and gt functions? by kraftwerk1611
2
by kraftwerk1611
Chapter 7
Test for CPU.hdl won't run (missing files) by Kuro
7
by cadet1620
Chapter 5
Hanging Simulator by Joe
3
by cadet1620
Project 5
Processor vs RAM performance by moejoe125
1
by cadet1620
Other
How long does testing of PongL.asm should usually take? by kraftwerk1611
3
by cadet1620
Project 6
Mark Armbrust by cadet1620
2
by SpaceEagle
Users Forum
Would anyone be willing to look at my CPU code and tell me what I did wrong? by DarkPigeon
2
by DarkPigeon
Project 5
How to enter an inifinte loop to take keyboard entry by kraftwerk1611
5
by kraftwerk1611
Project 4
Java Exceptions While Testing Memory/Computer by CosmicVole
1
by ivant
Project 5
Any suggestions on how to approach the building of the CPU Chip? by DarkPigeon
2
by DarkPigeon
Chapter 5
1-Bit register. fig 3.1 on page 43 of book by ajamil
2
by ajamil
Project 3
Register comp file by ajamil
2
by ajamil
Project 3
DFF comparison file by ajamil
2
by ajamil
Project 3
error in implementation of ALU status bits zr & ng by ajamil
3
by cadet1620
Project 2
From Nand2Tetris part III by Steven Dodd
0
by Steven Dodd
More Fun to Go
Creating the HDL code for the OR gate and MUX gate by asilvester635
2
by cadet1620
Chapter 1
Don't seem to understand the fetch-execute clash specified in Unit 5.2 by DarkPigeon
2
by DarkPigeon
Chapter 5
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