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chip is not found in the working or built in folders
by fabrice
2
by naidnicsec
Chapter 1
HDL File edited in text editor won't show changes when chip uploaded
by Margaret
13
by WBahn
Hardware Simulator
Not sure why RAM8 implementation does not work
by davidtaylor23
8
by WBahn
Project 3
Problem in 2's compliment
by RasenRhino
12
by WBahn
Chapter 2
no matter what I do I only get 0 as outputs. what am I doing wrong
by compscinoob
6
by WBahn
Chapter 1
ALU-notstat.hdl is missing
by killerbean7
2
by killerbean7
Chapter 2
FullAdder imp.
by ysh443
7
by WBahn
Chapter 2
Stuck on PC
by mwy
7
by WBahn
Chapter 3
Not 16
by ron2308
6
by WBahn
Chapter 1
How do you derive logical true or false in practice?
by frdschott
1
by WBahn
Chapter 2
Confused why ALU implementation will not load on hardware simulator
by davidtaylor23
5
by davidtaylor23
Chapter 2
Confused why MUX implementation is not working:
by davidtaylor23
1
by WBahn
Chapter 1
"Not" gate
by ron2308
16
by ron2308
Chapter 1
What is wrong with my RAM64 Implementation?
by Jiangmh
2
by Jiangmh
Project 3
Mux gate
by ron2308
4
by ron2308
Chapter 1
ALU Problem(It says comparison fail but i couldn't find the problem)
by ChenYi
1
by WBahn
Project 2
RAM64 Line27, a pin name is expected
by Leontocephaline
6
by Leontocephaline
Chapter 3
And16
by DK3250
6
by DK3250
Chapter 1
Mux4way16 problem
by Idrisadeniyi
22
by Idrisadeniyi
Chapter 1
ALU issue with built in Not chip
by LFinch
2
by LFinch
Chapter 2
Dmux4way Issues
by Idrisadeniyi
0
by Idrisadeniyi
Chapter 1
Mux4way16 problem
by Idrisadeniyi
3
by Idrisadeniyi
Project 1
"And" Gate
by ron2308
5
by WBahn
Chapter 1
Chip Not4 is not found in the working and built in folders
by Infidian
3
by WBahn
Chapter 1
nota - usage
by ron2308
2
by ron2308
Chapter 1
Mux16
by Idrisadeniyi
3
by WBahn
Chapter 1
Multiplexer Gate
by Idrisadeniyi
6
by WBahn
Chapter 1
Modified HDL file fails to load with error message
by Infidian
3
by Infidian
Chapter 1
Comparison Failure for And or Or gates
by Idrisadeniyi
8
by Idrisadeniyi
Chapter 1
Usefulness of internal pins which are (implicitly) buses?
by neophyte
9
by WBahn
Appendix A (HDL)
Hardware Simulator is not loading my edited chip
by Idrisadeniyi
8
by Idrisadeniyi
Hardware Simulator
Load Hardware Simulator in interactive mode
by neophyte
2
by neophyte
Hardware Simulator
Eval is not working - not highlighted
by alkhadour
2
by Fabian
Chapter 1
Is my gate logic too complicated?
by Aleks
3
by Aleks
Chapter 1
RAM64 address allocation problem within DMux and Mux
by ajksdf
8
by WBahn
Project 3
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